Here's an excerpt from an old Micronote (#039) (Thanks Richard Wallace)
+---------------+ +-----------------+ | d i g i t a l | | uNOTE # 039 | +---------------+ +-----------------+ +----------------------------------------------------+-----------------+ | Title: Differences between KDJ11-A and KDJ11-B | Date: 8-Aug-85 | +----------------------------------------------------+-----------------+ | Originator: Peter Kent | Page 1 of 5 | +----------------------------------------------------+-----------------+ Purpose
The purpose of this MicroNote is to identify and discuss the differences between the KDJ11-A and KDJ11-B CPU modules.
[ Stuff Deleted ]
Cache
For a full discussion of cache memory as used on the KJD11-A and
KDJ11-B refer to MicroNote #9 and the KDJ11-A and KDJ11-B User's
Guides. Both CPU modules have a similar cache organization using a
nine bit tag. This nine bit field contains information that is
compared to the address label, which is part of the physical address.
When the physical address is generated, the address label is compared
to the tag field. If there is a match it can be considered a hit
provided that there is entry validation and no parity errors. The
KDJ11-B has an additional tag store called the DMA tag. The DMA tag is
an identical copy of the cache tag store and is used to monitor the
main memory DMA updates while the cache tag store monitors the DCJ11
requirements. The presence of the second tag store - DMA tag - allows
the J-11 microprocessor to continue processing after it has
relinquished the system bus to a DMA device. When the DMA tag detects
a hit (main memory location written to by the DMA device), the
microprocessor stops and relinquishes the internal bus to the cache
controller to allow it to monitor further DMA activity on the bus. The
KDJ11-A, however, has only one tag store and stops processing as soon
as it relinquishes the system bus to a DMA device.
The PDP-11 processors have also found themselves in other roles:
- Most PDP-10/DECsystem-10 and DECsystem-20 frontend processors and
communications processors were PDP-11/20s and /40s.
- VAX-11/780 front end processor/console was an 11/03.
- Many of the VAX 8000-series machines had PDP-11 based PRO-350/380
frontends.
- LAT was originally implemented on PDP-11s as comms processors.
- DECSA Ethernet Terminal Server had a PDP-11 as a heart.
- All the HSCxxx Storage controllers use PDP-11 processors.
- DEUNA Ethernet Controller.
...and elsewhere.
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